ANALYSIS TYPE / 04

Eye Diagram & Jitter

BER · margin · jitter decomposition

Ansys SIwaveIBIS-AMI ModelsAnsys PathFinderKeysight ADS

Overview

Eye Diagram & Jitter

Simulating complete channel performance at the target bit rate — generating statistical eye diagrams, BER estimates, and full jitter decomposition to evaluate mask compliance and identify margin-limiting contributors.

Deliverables

Eye Diagram ReportJitter DecompositionBER vs. Margin CurvesEqualiser Recommendations

Key Aspects

What Eye Diagram & Jitter Involves

01

Statistical Eye Diagram

Constructing statistical eye diagrams via IBIS-AMI or channel simulation for realistic bit-rate performance assessment, including ISI, random jitter, and deterministic jitter contributions.

02

Jitter Budget Analysis

Decomposing total jitter into deterministic, random, and bounded uncorrelated components — attributing margin loss to specific physical root causes in the channel.

03

BER Estimation

Projecting bit error rate at target operating margin to confirm compliance with interface specifications such as PCIe, USB 3.x, and DDR eye mask requirements.

04

Equalization Optimization

Evaluating CTLE, FFE, and DFE equaliser settings to maximise eye opening and determine the optimal TX/RX equalization strategy for the channel under analysis.

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